Protocols

MIPI I3C: The Next-Generation Sensor Interface Replacing I2C

14 min read Protocols

MIPI I3C: The Future of Sensor Connectivity

MIPI I3C (Improved Inter-Integrated Circuit) is a next-generation sensor interface specification developed by the MIPI Alliance. Designed as a successor to I2C, I3C provides significantly higher performance while maintaining backward compatibility with I2C devices on the same bus.

Why I3C Over I2C?

  • 12.5 MHz SDR Speed: vs 3.4 MHz for I2C High-Speed mode
  • In-Band Interrupts (IBI): No separate interrupt lines needed
  • Dynamic Addressing: No more address conflicts
  • Hot-Join: Devices can join bus during operation
  • Lower Power: Push-pull drivers, no pull-up resistors
  • 2-Wire Interface: Same pinout as I2C (SDA, SCL)

I3C vs I2C Detailed Comparison

Feature I2C I3C
Maximum Speed 3.4 Mbps (HS mode) 12.5 Mbps (SDR), 25+ Mbps (HDR)
Driver Type Open-drain Push-pull (SDR), Open-drain (legacy)
Pull-up Resistors Required Optional (for I2C compat)
Addressing Static (7-bit/10-bit) Dynamic assignment
Interrupts Separate IRQ lines In-Band Interrupt (IBI)
Hot-Join No Yes
Multi-Master Yes (complex) Yes (simplified)
Power Consumption Higher (pull-ups) Lower

I3C Operating Modes

1. SDR (Single Data Rate) Mode

The primary operating mode for I3C:

  • Up to 12.5 MHz clock frequency
  • Push-pull drivers for both SDA and SCL
  • Maximum throughput: ~12.5 Mbps

2. HDR (High Data Rate) Modes

Optional high-speed modes for increased bandwidth:

  • HDR-DDR: Double Data Rate, up to 25 Mbps
  • HDR-TSP: Ternary Symbol Pure, up to 33 Mbps
  • HDR-TSL: Ternary Symbol Legacy, up to 33 Mbps

3. I2C Legacy Mode

Backward compatibility with I2C devices:

  • Open-drain operation for I2C targets
  • Standard/Fast/Fast-Mode Plus support
  • I2C devices coexist with I3C devices on same bus

Key I3C Features Explained

Dynamic Address Assignment (DAA)

I3C eliminates I2C's address conflict problems:

  1. Master discovers devices using their Provisional ID
  2. Master assigns unique 7-bit dynamic addresses
  3. No need for address pins or software configuration

Provisional ID Structure (48 bits)

┌──────────────────────────────────────────────────────────────┐
│ MIPI Manufacturer ID │ Part ID │ Instance ID │ DCR │ BCR    │
│      (16 bits)       │(16 bits)│  (4 bits)   │(8b) │ (4b)   │
└──────────────────────────────────────────────────────────────┘
      

In-Band Interrupt (IBI)

Devices can request attention without dedicated interrupt pins:

  • Target initiates by pulling SDA low during idle
  • Master arbitrates if multiple IBIs occur
  • Optional Mandatory Data Byte (MDB) for interrupt type
  • Reduces pin count and board complexity

Hot-Join

Devices can be connected to a live bus:

  • New device signals presence via Hot-Join request
  • Master performs DAA for the new device
  • Essential for modular systems and hot-plug scenarios

Common Command Codes (CCC)

Standardized commands for device management:

  • ENEC/DISEC: Enable/Disable Events
  • SETDASA: Set Dynamic Address from Static Address
  • RSTDAA: Reset Dynamic Address Assignment
  • GETPID: Get Provisional ID
  • GETBCR/GETDCR: Get Bus/Device Characteristics

I3C Applications

Mobile and Wearable Devices

  • Sensor hubs connecting multiple sensors
  • Accelerometers, gyroscopes, magnetometers
  • Ambient light and proximity sensors
  • Biometric sensors (heart rate, SpO2)

IoT and Embedded Systems

  • Environmental sensors (temperature, humidity, pressure)
  • Smart home devices
  • Industrial sensors with dynamic configuration

Automotive Applications

  • ADAS sensor interfaces
  • Battery management systems
  • Interior sensing (occupancy, gesture)

I3C Controller Implementation

Master Controller Features

  • Full I3C Basic v1.1 compliance
  • SDR and HDR-DDR mode support
  • Dynamic Address Assignment engine
  • IBI handling with configurable queue
  • I2C legacy device support
  • DMA interface for data transfers

Target (Slave) Controller Features

  • Provisional ID configuration
  • IBI initiation capability
  • Hot-Join support
  • SDR and optional HDR modes
  • Configurable FIFOs

Bus Interface Considerations

  • Push-Pull to Open-Drain Transition: Must handle mixed bus
  • Bus Free Time: Different for I3C vs I2C operations
  • Arbitration: Different mechanism than I2C

Migrating from I2C to I3C

Hardware Considerations

  • Same physical interface (SDA, SCL pins)
  • May need stronger pull-ups for I2C devices
  • Consider bus capacitance for high-speed operation

Software Changes

  • Initialize I3C controller and perform DAA
  • Handle IBI events instead of GPIO interrupts
  • Use dynamic addresses instead of static
  • Implement CCC commands for device management

Conclusion

MIPI I3C represents a significant advancement in sensor connectivity, offering higher speeds, reduced pin count, and improved power efficiency while maintaining I2C compatibility. As sensor counts in devices continue to grow, I3C provides the scalability and performance needed for next-generation products.

Vcores offers MIPI I3C Basic v1.1 compliant controller IP cores for both Master and Target implementations. Our IP includes full SDR and HDR-DDR support, dynamic addressing, IBI handling, and I2C backward compatibility.

Technical References

  • MIPI I3C Basic Specification v1.1.1
  • MIPI Alliance - I3C Sensor Specification
  • JEDEC JESD403 - I3C for Memory Devices
Tags: MIPI I3C I2C replacement sensor interface IoT protocols mobile sensors dynamic addressing

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